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IonQ indicates that its 32 qubit trapped ion quantum computer can achieve a quantum volume of 4 million. Honeywell has the leading commercial quantum computer (also trapped ion) that has a quantum volume of 512. Quantum volume is a quantum computer power benchmark that factors in qubits and the ability of the quantum system to maintain stability and solve a standardized problem.

The investor presentation deck shows that IonQ believes that their error correction will only take 16 dirty qubits to achieve 1 error corrected qubit. Other quantum systems are looking at thousand of dirty qubits to get one error corrected qubit. It is believed that error corrected qubits are needed to achieve massively scaled quantum computers.

The layout of the D-Wave QPU is critical to formulating an objectivefunction in a format that a D-Wave annealing quantum computer can solve,as described in the Solving Problems with Quantum Samplers section.Although Ocean software automates the mapping from the linear and quadraticcoefficients of a quadratic model to qubit bias and coupling values set on theQPU, you should understand it if you are using QPU solvers directly because ithas implications for the problem-graph size and solution quality.

The D-Wave quantum processing unit (QPU) is a lattice of interconnected qubits.While some qubits connect to others via couplers, the D-Wave QPU is not fullyconnected. Instead, the qubits of D-Wave annealing quantum computers interconnectin one of the following topologies:

For example, each D-Wave 2000Q QPU is fabricated with 2048 qubits and 6016couplers in a Chimera topology. Of this total, the number and specific set ofqubits and couplers that can be made available in the working graph changeswith each system cooldown and calibration cycle. Calibrated commercial systemstypically have more than 97% of fabricated qubits available in their workinggraphs.

Internal couplers connect pairs of orthogonal (with opposite orientation) qubitsas shown in Figure 12. TheChimera topology has a recurring structure of four horizontal qubits coupledto four vertical qubits in a \(K_4,4\) bipartite graph, called aunit cell.

The notation CN refers to a Chimera graph consisting of an \(N\rm xN\) gridof unit cells. The D-Wave 2000Q QPU supports a C16 Chimera graph: its more than2000 qubits are logically mapped into a \(16 \rm x 16\) matrix of unitcells of 8 qubits. The \(2 \rm x 2\) Chimera graph ofFigure 12 is denoted C2.

Pegasus features qubits of degree 15 and native \(K_4\) and \(K_6,6\)subgraphs. Pegasus qubits are considered to have a nominal length of 12 (eachqubit is connected to 12 orthogonal qubits through internal couplers) and degreeof 15 (each qubit is coupled to 15 different qubits).

As the notation \(C_n\) refers to a Chimera graph with size parameterN, \(P_n\) refers to instances of Pegasus topologies; for example,\(P_3\) is a graph with 144 nodes.A Pegasus unit cell contains twenty-four qubits, with each qubit coupled to onesimilarly aligned qubit in the cell and two similarly aligned qubits in adjacentcells, as shown in Figure 22. AnAdvantage QPU is a lattice of \(16x16\) such unit cells, denoted as a\(P_16\) Pegasus graph.

A Zephyr unit cell, as shown in Figure 25,contains two groups of eight half qubits, with each qubit in the cell coupled either tofour oppositely aligned qubits and one similarly aligned qubit (four \(K_4,4\)complete graphs with their internal and external couplings) or to eight oppositelyaligned qubits and one similarly aligned qubit (a \(K_8,8\) complete graphwith its internal and odd couplings).

We present a protected superconducting qubit based on an effective circuit element that only allows pairs of Cooper pairs to tunnel. These dynamics give rise to a nearly degenerate ground state manifold indexed by the parity of tunneled Cooper pairs. We show that, when the circuit element is shunted by a large capacitance, this manifold can be used as a logical qubit that we expect to be insensitive to multiple relaxation and dephasing mechanisms.

Superconducting circuits are widely recognized as a powerful potential platform for quantum computation and now stand at the frontier of quantum error correction.1 Future progress will likely stem from two complementary strategies: (i) active error correction characterized by measurement-based2,3,4 and autonomous5,6,7,8 stabilization, and (ii) passive error correction characterized by protected qubits,9 and references therein]. We address strategy (ii) in this article by designing an experimentally accessible protected qubit.

a Electrical circuit for the transmon qubit. b Potential energy of the transmon with energy levels and wavefunctions for the first few eigenstates. c Electrical circuit for the idealized protected qubit. The cross-hatched circuit element comprises a capacitance in parallel with an inductive element that exclusively permits the tunneling of pairs of Cooper pairs. The superconducting island is indicated by color. d Potential energy of the ideal charge-protected qubit with the lowest-energy levels and wavefunctions.

In this article, we introduce a few-body transmon-type qubit where the charge carriers are exclusively pairs of Cooper pairs. Our central result is that there exists an experimentally attainable parameter regime for which conservative predictions of relaxation and dephasing times exceed \(1\) ms, i.e., an order of magnitude higher than those of typical transmons, given the same environmental noise.13,14 In the following section, we describe a toy model for the protected qubit. We proceed by analytically and numerically examining the Hamiltonian for the full superconducting circuit. Our attention then turns to properties of the ground state manifold, which we envision using as a protected qubit. A brief discussion about the concept of protection and examples of protected qubits, as well as our perspectives on readout and control, follows.

We first examine the advantages of the ideal circuit in Fig. 1c as a protected qubit. This circuit can be viewed as a Josephson-junction-like element (the cross-hatched box) shunted by a capacitance. Pairs of Cooper pairs are the only charge excitations permitted to tunnel through this element.11 In the Cooper pair number basis, the potential energy assumes the form

The charge wavefunctions are grid states with Fock-state envelopes.16,24 For fluxon excitation index \(+/-\), these grid states are superpositions of even/odd Cooper pair number states. Additionally, \(m\) corresponds to the order of the Fock-state envelope. Note that a logical qubit encoded in \(\left0+\right\rangle\) and \(\left0-\right\rangle\) is protected from spurious transitions except those mediated by operators that flip Cooper pair parity.

In the previous sections, we analyzed the multi-mode Hamiltonian describing the superconducting circuit in Fig. 2a. Numerical diagonalization of this Hamiltonian showed the emergence of a linear plasmon mode and a nonlinear fluxon mode. In the following sections, we consider the properties of the logical qubit formed by \(\\left\), the two lowest-energy eigenstates at \(\varphi _\rmext=\pi\), which generalizes to \(\0\circ \right\rangle ,\left\) away from \(\varphi _\rmext=\pi\).

To better elucidate which types of operators can and cannot induce transitions between the two states of the qubit, we examine the relevant matrix elements corresponding to capacitive and inductive coupling. This discussion is particularly relevant to understanding the expected dominant loss mechanisms and designing a measurement and control apparatus that does not directly couple to the qubit.

to the Hamiltonian in Eq. (5), in addition to dressing the shunt capacitance. This voltage may be a degree of freedom of another mode in the embedding circuit, a noise source, or an ac drive. We therefore see that the susceptibility of undergoing a transition from the ground state, due to capacitive coupling to the qubit island, is directly related to the matrix element \(\langle \psi \eta 0\circ \rangle\).

to the Hamiltonian in Eq. (5). Here, \(\phi _0=\hslash /2e\) is the reduced magnetic flux quantum and \(L\) is the superinductance in each arm of the qubit (i.e., \(\epsilon _L=\phi _0^2/L\)). Like the voltage source, this current may represent an internal or environmental degree of freedom. We see that the susceptibility of undergoing a transition from the ground state, due to inductive coupling to the inductive loop, is related to the matrix element \(\langle \psi \phi 0\circ \rangle\).

We see from Fig. 4a that transitions mediated by capacitive coupling to the qubit island are only allowed from \(\left0\circ \right\rangle\) to \(\left1\circ \right\rangle\). These selection rules result from the decoupling of the even and odd Cooper pair number parity manifolds (see Supplementary information). Most importantly, transitions between qubit states are forbidden, meaning capacitive coupling offers a promising ingredient for indirect qubit measurement and control (see Discussion). Conversely, inductive coupling to the inductive loop of the qubit permits transitions between \(\left0\circ \right\rangle\) and \(\left0\bullet \right\rangle\) in the vicinity of \(\varphi _\rmext=\pi\), as shown in Fig. 4b. This effect arises because the operator \(\phi\) induces transitions between the Cooper pair parity manifolds, as can be seen from the Fourier series for Eq. (6). As a consequence, we expect that relaxation of the qubit will be primarily due to inductive loss in the superinductances (see Relaxation).

Note in Fig. 5 that the charge dispersion and energy splitting follow the same general trend for inductive disorder as for the other three. The key difference is that the charge dispersion decreases more quickly than for any other form of disorder. Oppositely, the splitting is initially the same as for area disorder, but the slope decreases in \(\delta _L\). We conclude that disorder allows us to engineer a circuit with a sufficiently non-degenerate ground state manifold whose charge dispersion is largely suppressed. For reasons that will become clear in two sections, these features are extremely valuable for designing a qubit that is protected from dephasing. 59ce067264

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